Jared Lee

Director @ Cadence Design Systems | Sales, Engineering Management

Role
Ae Director at Cadence
Location
San Diego County, CA, US
LinkedIn followers
500 followers
Information TechnologyView LinkedIn profile

Experience

  1. Ae Director

    Cadence

    Oct 2020 — Present · San Diego, CA, US

Education

  • University of Phoenix

    BSIT, Software Engineering

    2005 — 2006

  • Mesa Community College

    CAD, Micro Circuit Mask Design

    1994 — 2003

  • Mesa Community College

    EET, Electrical Engineering

    1994 — 2003

Skills

  • Apr
  • Drc
  • Verilog
  • Application-Specific Integrated Circuits (Asic)
  • Account Management
  • Mask Design
  • Formal Verification
  • Tcl
  • Vhdl
  • Simulations
  • Very-Large-Scale Integration (Vlsi)
  • Floorplanning
  • Integrated Circuit Design
  • Microprocessors
  • Lvs
  • Cadence
  • Ic
  • Project Management
  • Low-Power Design
  • Go-to-Market Strategy
  • Physical Design
  • Asic
  • Sales Management
  • Rtl Design
  • System on a Chip (Soc)
  • Vlsi
  • Mixed Signal
  • Processors
  • Integrated Circuits (Ic)
  • Place & Route
  • Soc
  • Debugging
  • Perl
  • Silicon
  • Eda
  • Semiconductors
  • Static Timing Analysis

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Jared Lee — Ae Director at Cadence in San Diego County, CA, US | Unifers