Janani R.

Role
Lead Design Engineer - Tensilica Ip at Cadence
Location
San Jose, CA, US
LinkedIn followers
500 followers
Information TechnologyView LinkedIn profile

About Janani R.

Hello! Thanks for stopping by! I currently work as an RTL design engineer in the…

Experience

  1. Lead Design Engineer - Tensilica Ip

    Cadence

    Dec 2025 — Present · Cork, IE

    Got an internal transfer to Cork, starting December 2025. Roles and responsibilities remain the same as it was in San Jose

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Janani R. — Lead Design Engineer - Tensilica Ip at Cadence in San Jose, CA, US | Unifers