Janak Patel
Senior Principal Engineer at Marvell Semiconductor
- Role
- Senior Principal Engineer at Marvell Technology
- Location
- South Burlington, VT, US
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
About Janak Patel
Project management-Chip carrier packages processes development(FC-PBGA and…
Experience
Senior Principal Engineer
Nov 2019 — Present · Burlington, VT, US
Education
University of Illinois Chicago
Master of Science
1986 — 1988
Maharaja Sayajirao University of Baroda, Baroda, Gujarat
B.E.
1978 — 1983
Skills
- Semiconductors
- Systems Engineering
- Measurements
- Engineering Management
- Electronics
- Six Sigma
- Engineering
- Spc
- Design of Experiments
- Manufacturing
- Failure Analysis
- Process Engineering
- Thermal Management
- Mechanical Engineering
- Pcb Design
- Matlab
- Simulations
- Testing
- Technical Writing
Find verified contacts for anyone on LinkedIn
Unifers gives sales teams verified emails and direct dials, enriched profiles, and outreach that lands in the inbox.
Free plan included · No credit card required
This profile is compiled from publicly available professional sources. Unifers is not affiliated with or endorsed by LinkedIn. Request removal of this profile.