Amit J.
Leader, Enabler
- Role
- Executive Director at Synopsys Inc
- Location
- Fremont, CA, US
- LinkedIn followers
- 500 followers
About Amit J.
At Synopsys Inc, my leadership as Executive Director is characterized by fostering a global team that consistently meets business goals and drives innovation. With a focus on customer solutions, my approach integrates competitive assessments with executive presentations to articulate and deploy large-scale product strategies in the semiconductor and EDA domains.• Customer solution driven Professional with 20+ years of technology and management experience in development of large-scale products and solutions in Semiconductor and EDA• Build, lead and mentor global teams (India, Europe, Taiwan, USA) to scale operations. Fostered leadership to meet business goals, customer needs and drive innovation• Wide-ranging experience in developing go to market strategy, product positioning, story-building, product strategy and deployment strategy to deliver on business goals in a fast-evolving semiconductor and EDA business.• Drive business growth with strong technical understanding, well-honed communication skills, a keen insight into customer needs & leveraging on product strengths.• Product lead with experience from conceptualizing to successfully deploying leading edge technology in semiconductor design & EDA• Core member of Product development team. Responsible for projects release cycles, technical milestones, deployment strategy & resource management• ASIC Physical Design Methodology expert with experience from Architecture, SoC planning, Synthesis, Implementation, Clock tree, Static Timing Analysis and Signoff
Experience
Executive Director
Mar 2024 — Present · US
Education
Pune Institute of Computer Technology
Bachelor of Engineering (B.E.), Electrical, Electronics and Communications Engineering
1997 — 2001
Fergusson College
High School graduate, Science
1996 — 1997
MIT Sloan School of Management
Certificate, Internet of Things
2017 — 2017
Skills
- Physical Design
- Deployment Strategies
- Very-Large-Scale Integration (Vlsi)
- Cmos
- Integrated Circuits (Ic)
- P&R
- Ic
- Asic
- Vlsi
- Timing Closure
- Verilog
- Rtl Design
- Semiconductors
- Static Timing Analysis
- Place & Route
- Debugging
- Product Development
- Eda
- Timing
- Soc
- System on a Chip (Soc)
- Mixed Signal
- Dft
- Project Management
- Low-Power Design
- Strategic Planning
- Application-Specific Integrated Circuits (Asic)
- Physical Verification
- Tcl
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