Jalaj Jain

Soc Validation @NXP Semiconductors

Chandler, AZ, US
EMAILS
j••••••••@nxp.com
MOBILE NUMBERS
+91 *********19

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WORK HISTORY

Aug 2013 — Present

Soc Validation @NXP Semiconductors

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Chandler, AZ, US

Technical Project management for Silicon Validation, Key responsibilities include electrical validation of SOCs and analog IPs like PLLs, ADC/DAC, Oscillators, voltage regulators, Bandgaps, Current/Voltage reference circuits. Communication interface validation for SPI, I2C, DSI3, PSI5. Signal and power integrity analysis of related boards using Cadence Sigrity. Team development, Bench setup, Test plan development and LabVIEW code for complete automation of the bench. Led multi DUT level validation setup designs to reduce validation time and in house setups owing to cost reduction. Cross functional support for ATE and Application Engineering, Key interface for CQC/CQI support.

EDUCATION

N/A

Maharshi Dayanand University

Master of Business Administration - MBA, Business Administration, Management and Operations

N/A

Vedant, Semiconductor complex limited

post graduate diploma in vlsi design, analog and degital design,RTL

N/A

B.M. Institute Of Engineering & Technology ( BMIET )

Bachelor of Engineering - BE, Electrical, Electronics and Communications Engineering

SKILLS

LabviewAllegroValidationAutomationTestingAgilent AdsSemiconductorsMixed SignalCadence VirtuosoVlsiPcb DesignSensorsSocVerilogSystem on a Chip (Soc)Very-Large-Scale Integration (Vlsi)

ABOUT JALAJ JAIN

Technical project management for Silicon Validation, Developed the validation facility for SOC validation, right from procurement of equipments, board design and Signal/Power integrity analysis, SOC validation and Automation using LabVIEW. Bring-up of fresh graduates and new hires to expert level. Supported Design Validation, Test Engineering, Product Engineering and Application Engineering groups.Key interface with customers to handle CQCs and related Silicon debugs

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