Jaikrishna Ramachandran

Etch & Implant Process Engineer @Nexperia

Manchester, GB

Oversaw critical semiconductor manufacturing processes including Dry Etch, Wet Etch, Implant, CMP, and SACVD deposition, ensuring process stability and yield control above 97%Qualified new equipment and developed process recipes across multiple modules, accelerating technology transfer and improving tool availability.Led LAM tool qualification and LSRi endpoint integration, enhancing etch precision and enabling 7× process route scalability.Optimised planarisation uniformity by 30% through DOE methodology and TCP etcher tuning, driving measurable yield improvement.Eliminated redundant photolithography steps through a Six Sigma project in collaboration with the Photolithography team, saving £132K annually and cutting process cycle time by 3%.Conducted FMEA, supported lot-level disposition, and reduced wafer scrap through cross-functional collaboration.Contributed to 8D investigations on customer complaints related to Top Contact Metal Corrosion and parametric failures.Mentored Process Assistants, providing training in yield analysis, SPC interpretation, and process troubleshooting, while guiding them in effective project planning and execution.

Amity University, Noida

Bachelor's degree

The University of Manchester

Master of Science - MS