Jagjit Khilari

Digital IC Design Engineer @ Marvell Technology Pvt Ltd | Ex-Intern at Marvell Technology Pvt Ltd | BTech Electrical Engineering from COEP Technological University

Role: Digital Ic Design Engineer at Marvell Technology
Location: Mumbai, MH, IN
LinkedIn followers: 500 followers

Information TechnologyView LinkedIn profile

Experience

Digital Ic Design Engineer
Marvell Technology
Jul 2025 — Present

Education

Royal Junior College
HSC
2019 — 2021
B R Madhavi English School
SSC
College of Engineering Pune
Bachelor of Technology - BTech
2021 — 2025

Contact information

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Work email
•••••@marvell.com
Personal email
•••••@•••••.com
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Current company

Marvell Technology

Semiconductor Manufacturing · 5K employees · Founded 1995 · 5488 Marvell Lane, Santa Clara, CA, 95054, US

We believe that infrastructure powers progress. That execution is as essential as innovation. That better collaboration builds better technology. At Marvell, we go all in with you. Focused and determined, we unite behind your goals as our own. We leverage our unrivaled portfolio of infrastructure technology to identify the best solution for your unique needs. And we sit shoulder-to-shoulder with your teams to build it. Agile in our thinking, and our partnerships, we look for unexpected connections that deliver a competitive edge and reveal new opportunities. At Marvell, we’re driven by the belief that how we do things matters just as much as what we do. Because, with a foundation built on partnership, anything is possible.

marvell.com

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Experience

Digital Ic Design Engineer

Education

Royal Junior College

B R Madhavi English School

College of Engineering Pune

Find verified contacts for anyone on LinkedIn