Jagadeeshwar Surigi
Principal Engineer ASIC Physical Design at Micron Technology
- Role
- Principal Engineer Asic Physical Design at Micron Technology
- Location
- Hyderabad, TG, IN
- LinkedIn followers
- 500 followers
Experience
Principal Engineer Asic Physical Design
Apr 2022 — Present · Hyderabad, IN
Education
NIT Calicut
M-Tech, VLSI
2010 — 2012
CVR College of Engineering
Bachelor of Technology (B.Tech.), Electrical, Electronics and Communications Engineering
2006 — 2010
Skills
- Physical Design
- Cadence Virtuoso
- Serdes
- Modelsim
- Very-Large-Scale Integration (Vlsi)
- Asic
- Systemverilog
- Vhdl
- Verilog
- Vlsi
- Cmos
- Static Timing Analysis
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