Jae Min Park

Role
Smts Silicon Design Engineer at AMD
Location
Santa Clara, CA, US
LinkedIn followers
500 followers

About Jae Min Park

Hands-on experience from architectural decisions to compliance tests

Experience

  1. Smts Silicon Design Engineer

    AMD

    Jun 2022 — Present

    Joined AMD-Xilinx SERDES team at San Jose

Education

  • Yonsei University

    Bachelor of Science - BS, Electrical and Electronics Engineering

    2001 — 2007

  • Stanford University

    Master of Science - MS, Electrical Engineering

    2008 — 2011

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Jae Min Park — Smts Silicon Design Engineer at AMD in Santa Clara, CA, US | Unifers