J Srikanth

Physical Design Engineer - ll at Sign-Off semiconductor (Projects : 40nm, 28nm, 5nm & 5nm - methodology)

Role
Design Engineer - ll at SignOff Semiconductors
Location
Hyderabad, TG, IN
LinkedIn followers
500 followers

About J Srikanth

Hands on experience with floor planning, power planning, IR drop analysis, placement…

Experience

  1. Design Engineer - ll

    SignOff Semiconductors

    Jan 2025 — Present · Hyderabad, IN

Education

  • Geethanjali College of Engineering and Technology

    Bachelor of Technology - BTech

    2018 — 2021

  • MAHAVEER INSTITUTE OF ENGINEERING AND TECHNOLOGY Hyderabad

    Diploma of Education

    2015 — 2018

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J Srikanth — Design Engineer - ll at SignOff Semiconductors in Hyderabad, TG, IN | Unifers