Naveen Gannem
MTS Silicon Design Engineer @ AMD | Physical Design Implementation, STA Signoff
- Role
- Mts Silicon Design Engineer at AMD
- Location
- Hyderabad, TG, IN
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
About Naveen Gannem
As an MTS Silicon Design Engineer at AMD, my role involves leveraging my expertise in…
Experience
Mts Silicon Design Engineer
Dec 2023 — Present · Hyderabad, IN
Education
Birla Institute of Technology and Science, Pilani
Master of Technology - MTech
2023 — 2024
Government Institute of Electronics (GIOE)
Special Diploma in SCN
2013 — 2016
Institution of Engineers of India (IEI), Kolkata
Associate Member of Institution of Engineers (AMIE)
2017 — 2021
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