Isuru Herath

Principal Engineer @Arm

Cambridge, GB
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WORK HISTORY

Apr 2026 — Present

Principal Engineer @Arm

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Cambridge, GB

Led early-stage prototyping, performance analysis, and bottleneck identification across multiple Arm CPU product lines, including Cortex-A (Little/Big), Cortex-R, and AI/ML acceleration (SME)- Driving next-generation interconnect solutions for system-level performance improvements

EDUCATION

2008 — 2012

The University of Manchester

Doctor of Philosophy (Ph.D.), Computer Science

2003 — 2007

University of Peradeniya

Bachelor's Degree, Computer Engineering

SKILLS

Parallel ComputingComputer ScienceObject-Oriented Programming (Oop)Cache CoherencyHigh Performance ComputingSystem ArchitectureResearchComputer ArchitectureOopJavaSoftware DevelopmentLatexSimulationsPerformance EvaluationAlgorithmsLinuxMulti-CoreCProgramming

ABOUT ISURU HERATH

Performance architect with nearly 20 years of experience across CPUs (Cortex-A, Cortex-R), GPUs (PowerVR 6XT–8XE), and AI/ML accelerators (SME), with additional research in Hardware Transactional Memory and side-channel attacks.Currently working across multiple Arm CPU product lines, focusing on early prototyping, performance analysis, and bottleneck identification, while contributing to next-generation interconnect solutions for system-level performance improvements.Throughout my career, I have contributed to 15 patents (6 granted, 9 pending) and authored 7 publications, reflecting a strong track record of innovation and technical impact.

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Isuru Herath — Principal Engineer at Arm in Cambridge, GB | Unifers