Issy Kipnis
Sr. Principal Engineer at Intel
- Role
- Sr Principal Engineer at Intel
- Location
- Berkeley, CA, US
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
About Issy Kipnis
I have 30+ years of experience in the design and development of analog, RF, IO, sensors…
Experience
Sr Principal Engineer
Nov 2000 — Present
Education
University of Michigan
Master of Science (MS), Electrical and Electronics Engineering
1979 — 1981
UAM Universidad Autónoma Metropolitana
Bachelor's degree, Electrical and Electronics Engineering
1975 — 1979
Skills
- Rf
- Semiconductor Industry
- Asic
- Pll
- Pcie
- Hardware Architecture
- Serdes
- Architecture
- Soc
- Ic
- System on a Chip (Soc)
- Product Development
- Embedded Systems
- Eda
- Rtl Design
- Cadence Virtuoso
- Cellular Communications
- Low-Power Design
- Rfid+
- Semiconductors
- Manufacturing
- Debugging
- Wireless Technologies
- Silicon
- Wireless
- Application-Specific Integrated Circuits (Asic)
- Radio Frequency (Rf)
- Power Management
- Vlsi
- Verilog
- Integrated Circuit Design
- Microprocessors
- Mixed Signal
- Analog Circuit Design
- Circuit Design
- Signal Integrity
- Cmos
- Integrated Circuits (Ic)
- Analog
Find verified contacts for anyone on LinkedIn
Unifers gives sales teams verified emails and direct dials, enriched profiles, and outreach that lands in the inbox.
Free plan included · No credit card required
This profile is compiled from publicly available professional sources. Unifers is not affiliated with or endorsed by LinkedIn. Request removal of this profile.