Isha Das

About Isha Das

Expertise in RTL to GDSII:1) Synthesis of High performance Data-path 2) Floorplan, Placement, Routing & Signoff (Timing and quality across technology nodes) 3) Clock Tree Synthesis 4) DFT Network Delivery to all the clusters/blocks/sub-systems of the micro-processor Core 5) High Speed Noise Congergence fo Clusters/Blocks6) Low Power Methodologies7) Physical Verification (DRC/LVS/ERC/Antenna @ Block level)8) Dynamic Design expertise (Multimode Multicorner with wide voltage range)ASIC Pre-Si Verification Engineer:1) Expertise in owning Bus protocol2) Languages: System Verilog, Verilog, Specman, Perl, Shell3) Expertise in creating functional verification infrastructure and test bench4) Creation of multiple cycles of test-plan to sign-off for block and sub-system environment

Experience

1. Senior Staff Engineer Manager

   Qualcomm

   Nov 2022 — Present · Bengaluru, IN

Education

• Indian Institute of Technology, Kharagpur

  Master of Technology (MTech), Microelectronics and VLSI Design

  2010 — 2012

• West Bengal University of Technology

  Bachelor of Technology (B.Tech.), Electonics and Communication Engg.

  2006 — 2010

Skills

• Systemverilog
• Windows
• Application-Specific Integrated Circuits (Asic)
• Integrated Circuit Design
• Verilog
• Pspice
• Algorithms
• Matlab
• Very-Large-Scale Integration (Vlsi)
• C
• Programming
• Microsoft Office
• Vlsi
• Vhdl
• Simulations
• Electronics
• Asic
• C++
• Perl
• Embedded Systems
• Rtl Design