Isabel Barrios

Principal Design Engineer at Cadence Design Systems

Role
Principal Design Engineer at Cadence
Location
Santa Clara, CA, US
LinkedIn followers
500 followers

About Isabel Barrios

Summary: Adaptable professional with a versatile background of twenty years…

Experience

  1. Principal Design Engineer

    Cadence

    Feb 2020 — Present · San Jose, CA, US

Education

  • UCSC Extension - Silicon Valley

    Certificate, Project and Program Management

    2011 — 2013

  • Stanford Continuing Studies

    Python, JavaScript

    2016 — 2017

  • Universidad de Guadalajara

    BS, Communications & Electronics Engineering

    1977 — 1982

  • UCSC Extension - Silicon Valley

    Managing the Development of New Products

    2014

Skills

  • Systems Engineering
  • Npi Projects Coordination
  • Semiconductors
  • Manufacturing
  • Technical Documentation
  • Electronics
  • Wireless
  • Engineering
  • Project Planning
  • Rf
  • Pcb Design
  • Microwave Power Amplifiers
  • Management
  • Project Management
  • Testing
  • Process Improvement
  • Hardware
  • Telecommunications
  • Product Development
  • Troubleshooting

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Isabel Barrios — Principal Design Engineer at Cadence in Santa Clara, CA, US | Unifers