Suresh H S

About Suresh H S

I have over 12 years of experience in logic design verification in the VLSI industry. Currently, I work as a Staff Engineer at Western Digital with responsibilities of planning and verifying complex modules, leading projects, and introducing innovative process improvements. I have worked on various verification technologies like Assertion based verification(ABV), constrained random verification(CRV), Coverage driven verification, and formal verification. I have experience in handling unit-level design verification as well as SoC designs. I have hands-on experience with HDL languages like System Verilog & Verilog and I have been using Universal Verification Methodology(UVM) along with scripting languages like Python and C-Shell scripting.I have received an outstanding performance award for my project lead role. I have been recognized by my employer for bringing innovative ideas to improve the verification process. I hold a patent and have been awarded 4 trade secrets. I have won multiple awards in Hackathon events, and I have bagged first place in the Worldwide SanDisk Corporation Innovation Award. I have also presented my papers at the International SanDisk Technical Conference (ISTC), Milpitas, CA, USA.I am a passionate sports person and play football regularly. I blog and seldom paint.

Experience

1. Senior Asic Engineer

   NVIDIA

   Jan 2020 — Present · Bengaluru, IN

Education

• National Institute of Technology Karnataka

  B.Tech, Electronics and Communication

  2006 — 2010

• Jawahar Navodaya Vidyalaya - JNV

  6th - XII, PCMB

  1998 — 2005

Skills

• Usb
• C
• Xilinx Ise
• Vcs
• Coverage Analysis
• Systemverilog
• Debugging
• Verilog
• System Verilog
• Asic
• Functional Verification
• Vmm
• Unix
• Shell Scripting
• Ahb
• Unix Shell Scripting
• Synopsys Tools
• Amba Ahb
• Analysis
• Perl