Hin Wong
- Role
- Pmts Technical Lead at AMD
- Location
- Santa Clara, CA, US
- LinkedIn followers
- 500 followers
About Hin Wong
20+ years of experience on high performance x86/ARM CPU core IP design includes -…
Experience
Pmts Technical Lead
Jul 2019 — Present
Lead a team of >20 physical design engineers working on several extreme challenging units inside a high-performance CPU core at latest nodes. Successful tapeout multiple generations of Zen series CPUs (Ryzen, Eypc etc) from high level concept to PnR, final delivery, silicon debug and high volume product enablement and launch.
Skills
- Timing Closure
- Perl
- Processors
- Tcl
- High Performance Computing
- Integrated Circuit Design
- Eda
- Logic Synthesis
- Route
- Vlsi
- Primetime
- Low Power Systems
- Mixed Signal
- Timing
- Rtl Design
- Asic
- Verilog
- Static Timing Analysis
- Logic Design
- Cpu Design
- Microprocessors
- Semiconductors
- Tapeout
- Physical Design
- Ic
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