Hirok Kalita

Experience

1. Product Engineer

   Micron Technology

   Dec 2021 — Present · Boise, ID, US

   Responsible for driving pre-silicon simulations, post silicon bench validation and issue resolution activities by collaborating with cross-functional global teams for multiple NAND designs. Run Verilog (Digital) and Analog design simulations on NAND Products. Develop NAND product test mode definition and applications for NAND Memory products. Define and improve testing methods to address new experimental designs or debug issues on devices manufactured at Micron’s R&D and Fab10 Manufacturing facilities. Debug high priority issues and contributed to peak power reduction for current and future NAND Designs. Perform device characterization and electrical failure analysis (EFA). Work with Design Engineering to create new test modes (DFT) to improve overall testing effectiveness and efficiency. Led design validation and delivered performance/reliability goals with Trim optimization in tight timelines to release new NAND designs. Headed development work for multiple new NAND test chip products from pre silicon validation to final post silicon target goal. Trained multiple new hires within the team on bench validation and simulation work.

Education

• SRM University

  Bachelor’s Degree, Electrical and Electronics Engineering, 8.8/10

  2011 — 2015

• Army Public School Narangi

  High School, Science Stream, 90.6%

  2009 — 2011

• University of Central Florida

  Master’s Degree, Electrical Engineering, 3.69/4

  2016 — 2018

• South Point School

  High School, General Studies, 95.8%

  1998 — 2009