Himanshu Rawal

About Himanshu Rawal

Possible rewritten summary:With 25 years of experience in VLSI front-end domain, I am an engineering manager at Intel Corporation, where I lead the pre-silicon verification and validation of ASIC designs for FNICS, IPUs, ROCs, and HPC adapters, switches all of which are used in for networking and fabric connectivity in Data Centers/Cloud Hardware domain. My core competencies include team building, leading, and mentoring, IP management, ownership of pre-si validation, and building scalable verification environments using advanced HVLs and methodologies. I have also contributed to multiple publications and white papers on verification topics, such as OCP-IP and TLM. My mission is to deliver high-quality and reliable products that meet the customer requirements and exceed the industry standards.

Experience

1. Engineering Manager

   Intel

   Nov 2013 — Present · Bengaluru, IN

   Networking ASICsSubsystem and SoC level DVSimulation, Emulation and Formal ValIP verification and deliveryPeople managementTechnical leadershipPre Si Validation architectureValidation closure

Education

• Best Higher Secondary School, Ahmedabad

  Higher Secondary School Certificate, Physics, Chemistry, Mathematics

  1982 — 1996

• Nirma University

  B.E., Electronics and communication

  1996 — 2000

Skills

• Bug Tracking
• Fibre Channel
• Cvs
• Offshore Management
• Interviewing
• Team Building
• Ieee 802.11
• Git
• Regression Testing
• Systemverilog
• Sata
• Linux
• Modelsim
• Requirements Traceability
• Mentoring
• Functional Verification
• Infiniband
• Asic
• Synopsys Vcs
• Release Engineering
• Tcl
• Cadence Irun
• C/C++ Stl
• Specman
• Debugging
• Simulations
• Gcc/G++
• Gnu Make
• Coverage Analysis
• Technical Documentation
• Formal Verification
• Technical Presentations
• Test Cases
• Pci-X
• Behavioral Modeling
• Ncsim
• Open Verification Methodology
• Rtl Design
• Soc
• Bug Fixing