Henry L.

About Henry L.

Summary - Professional Background1. 15+ years’ experience of Semiconductor Product Engineering for PMIC & RF FEM.(throughout the entireproduct lifecycle from NPI to Mass Production sustaining)2. 15+ years’ experience for OSAT management (Amkor, Unisem, Carsem, Diodes, Taiwan KYEC and Mexicali)3. Knowledge of IC manufacture process – Fab, package, electrical test, reliability test and yield analysis.4. Knowledge in Product Characterization, Bench-to-ATE correlation and Guardband analysis for Product Spec definition and ramp up.5. Statistical data analysis tools, Galaxy, JMP and PDF Exensio.6. SAP and Agile System to establish product structure.AREAS OF EXPERTISE - Product Engineering> Semicoductor Product Lifecycle from Business Case Identification to Production.(Business Case Identification - Specification - Design - Optimize - Qualification - Production)> Cost Model Optimization (TTR, Assy/FT transfer, etc.)> Product Characterization and Datasheet Spec Definition> Bench-to-ATE correlation and ATE solution optimization> New Product Qualification/Stress including HTOL/HAST/TC/Samsung items.> ESD and Latch-up.> Failure Analysis Fault Isolation methodology (Thermal IR/Emmi/OBIRCH/XIVA/FIB/EDX) for RMA and Qual rejects.> Product structure & process on Fab & Assy & FT.> Team coordination between cross function team for a good project follow-up.> Data analysis with statistical tools like PDF Exensio, Galaxy and JMP.> OSAT management and control procedure optimization.

Experience

1. Senior Staff Product Engineer

   pSemi, A Murata Company

   Apr 2021 — Present · San Diego, CA, US

   NPI product engineering for WIFI/BTH PA FEM (RF SOI technology)- IoT application >Take charge of product engineering work for the whole lifecycle from kick-off to mass production.>Work closely with TE for DC WS and RF FT ATE solution development, such as trial run data review(against DE SIM/DV), ATE-bench correlation/offset defintion, datalog format/header, data flow establishment, etc >Interface with critical customer directly with Mkt/DE to present ATE analysis result and Compliance Matrix.>Define and finalize Spec limits with Char and ATE result for a project wrap up >Support ESD zapping for data review - p2p zapping die level 2. Sustaining of released products, WIFI/BTH PA FEM, ATS, LNA, Switch >Yield improvement, TTR, Probe solution optimization, Substrate qualification and etc3. RMA support >Lead and drive RMA case especially for released products for the whole RMA flow (ATE, Bench test, IV curve, Fault isolation )>Work with Design and Review schematic and layout in cadence to make instruction for FIB to FA team for Microprobe and other necessary fault isolation.>Certified to handle QFI-Quantum Focus Instrument for Fault Isolation.4. Knowledge sharing >Train new hire and intern to make sure them come up to speed in a quick way >Knowledge and experience sharing within PE team

Education

• Nankai University

  Bachelor of Engineering - BE, Electrical, Electronics and Communications Engineering