Junhong Chen
Master student @ Arizona State University. Focus on Analog and mixed signals
- Role
- Analog Design Engineer Intern at Intel
- Location
- Beaverton, OR, US
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
Experience
Analog Design Engineer Intern
Jun 2025 — Present · Hillsboro, OR, US
High Speed IO, UCIE
Education
Oregon State University
Bachelor's degree
2018 — 2022
Arizona State University
Master's degree
2023
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