Hemanth M.
DFT-DV Engineer at AMD
- Role
- Sr Silicon Design Engineer at AMD
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
About Hemanth M.
Working as a Core Validation Engineer at Intel. I have completed Master\'s degree in VLSI DESIGNS from Manipal School of Information Sciences, Manipal in May 2020.1.Build and develop validation test plans and test scenarios to prove the correctness of the design.2.Development of validation components for a simulation based environment, bus functional models, trackers, checkers, scoreboards, and testbenches.3.Building and delivery of an RTL model of the design - Performing and debugging simulations.4.Developing methodologies and capabilities, and driving process improvements.5.Working closely with design engineers, micro-architects, and other team members to ensure high quality of test plans and tests.6.Verified and analyzed some of the design features using various simulations tools including Synopsys VCS and VERDI, cadence specman e-language.7.Developing automated tools or scripts for the presilicon validation environment. Regression running and debugging failing tests, design and development of test bench collateral.8.Ensuring the logical design of a microprocessor satisfies the architectural specification.AREA OF INTERESTRTL Design, IP Design and Validation, Emulation Engineer, FPGA and SoC Design Engineer.
Experience
Sr Silicon Design Engineer
Apr 2024 — Present · Bengaluru, IN
Education
School of Information Science, Manipal
ME - Master of Engineering, VLSI Design
2018 — 2020
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