Hemanth Kumar Shiva Nagendra
Senior Design Verification engineer.
- Role
- Senior Design Verification Engineer at Analog Devices
- Location
- Dallas, TX, US
- LinkedIn followers
- 500 followers
About Hemanth Kumar Shiva Nagendra
RTL Verification with 6+ years of Industrial experience in RTL/FPGA Design Verification using Python, System Verilog, CocoTB and UVM with experience in 5G-NR physical channels.• Experience in Linux, server environment, editors like gvim, Version control like Bitbucket (Git),Simulators like Synopsis Verdi, Model-sim and Questa-sim to develop the test bench, test cases and automation of Regressions using Bash scripting.• Software Engineering: Industrial experience in all phases of Software Development Life Cycle, Object Oriented Programming, Data structures, Agile, Scrum & Kanban practices.
Experience
Senior Design Verification Engineer
Mar 2023 — Present · Dallas, TX, US
Education
SJB Institute of Technology
Bachelor of Engineering - BE, Electronics and Communications
2011 — 2015
California State University, Fresno
Master of Science - MS, Electrical Engineering
2016 — 2018
Find verified contacts for anyone on LinkedIn
Unifers gives sales teams verified emails and direct dials, enriched profiles, and outreach that lands in the inbox.
Free plan included · No credit card required
This profile is compiled from publicly available professional sources. Unifers is not affiliated with or endorsed by LinkedIn. Request removal of this profile.