Hema Hariharan
Hardware Engineer at Google
- Role
- Hardware Engineer at Google
- Location
- San Jose, CA, US
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
About Hema Hariharan
Hardware Engineer with a strong background in ASIC design & microarchitecture Proficient in System Verilog-based RTL Design & good knowledge of computer architecture Proven record as Design Lead and Individual Contributor on multiple projects from concept to tapeout
Experience
Hardware Engineer
Jun 2015 — Present
Education
Purdue University
MS, Electrical & Computer Engineering
2008 — 2010
Birla Institute of Technology and Science, Pilani
B.E.(Hons.), Electronics & Instrumentation
2004 — 2008
Skills
- Verilog
- Asic
- Logic Synthesis
- Application-Specific Integrated Circuits (Asic)
- C
- Very-Large-Scale Integration (Vlsi)
- Modelsim
- Systemverilog
- Computer Architecture
- Rtl Design
- Verilog/System Verilog
- Simulations
- Algorithms
- System on a Chip (Soc)
- Debugging
- Rtl Design/Verification
- Vlsi
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