Harshit Sharma

Physical Design Engineer @Cadence Design Systems | MTech(VLSI Design) IIT Jammu |

Role
Design Engineer Ii at Cadence
Location
Shimla, HP, IN
LinkedIn followers
500 followers

Experience

  1. Design Engineer Ii

    Cadence

    Jul 2025 — Present · Pune, IN

Education

  • Jawaharlal Nehru Government Engineering College, Sundernagar (H.P)

    Bachelor of Technology - BTech, Electrical, Electronics and Communications Engineering

  • Indian Institute of Technology Jammu

    Master of Technology - MTech, VLSI design

Find verified contacts for anyone on LinkedIn

Unifers gives sales teams verified emails and direct dials, enriched profiles, and outreach that lands in the inbox.

Free plan included · No credit card required

This profile is compiled from publicly available professional sources. Unifers is not affiliated with or endorsed by LinkedIn. Request removal of this profile.

Harshit Sharma — Design Engineer Ii at Cadence in Shimla, HP, IN | Unifers