Harshit Goel
MTS Silicon Design Engineer @ AMD | DFT Senior Lead Engineer @ Qualcomm | M.Tech in Microelectronics and VLSI
- Role
- Mts Silicon Design Engineer at AMD
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
About Harshit Goel
As a DFT Senior Lead Engineer at Qualcomm, I leverage my M.tech in Microelectronics and VLSI from the Indian Institute of Technology, Roorkee, and my B.tech in Electronics Engineering from Maharaja Agrasen College, University Of Delhi, to design and implement digital testing solutions for complex semiconductor products. With over 4 years of experience in the field, I have developed strong skills in embedded systems and embedded C programming, which enable me to optimize the performance and reliability of our products. I am passionate about staying updated with the latest advancements in the field and applying them to solve real-world problems. My goal is to contribute to the innovation and excellence of Qualcomm\'s products and services.
Experience
Mts Silicon Design Engineer
Jun 2025 — Present · Bengaluru, IN
Education
Maharaja Agrasen College, University Of Delhi
B.tech
2013 — 2017
Indian Institute of Technology, Roorkee
M.tech
2017 — 2019
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