Harshini Rao Peesara
Sr. Silicon Design Engineer at AMD
- Role
- Sr Silicon Design Engineer at AMD
- Location
- San Jose, CA, US
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
About Harshini Rao Peesara
Graduated from Arizona State University with a Masters degree in Computer Engineering…
Experience
Sr Silicon Design Engineer
Dec 2024 — Present · Santa Clara, CA, US
Education
Shiv Nadar University
B.tech
2015 — 2019
Shiv Nadar University
Minor degree
2016 — 2019
Arizona State University
Master's degree
2020 — 2022
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