Harshil Shah
- Role
- Design Engineering Manager at Texas Instruments
- Location
- Dallas, TX, US
- LinkedIn followers
- 500 followers
Experience
Design Engineering Manager
Aug 2019 — Present
Analytics IP Design team - EP (Platform Tech & Dev)(2020 - Current) Managing team of 5 members responsible for designing DSPs, memory system and accelerators for low to high end AI and DSP applications. Multicore Integration Team - EP (20••••20) Managed team of 4 members responsible for delivering multicore sub-system which includes ARM, DSPs, DMAs and L2/L3 Caches.
Education
The University of Texas at Dallas
MS, Circuits and Systems
2010 — 2012
L.D. College of Engineering
Electronics And Communication.
2006 — 2010
Skills
- C++
- Digital Electronics
- Cadence Virtuoso
- Electrical Engineering
- Asic
- Analog
- Digital Design
- Very-Large-Scale Integration (Vlsi)
- Verilog
- Eda
- C
- Vlsi
- Semiconductors
- Vhdl
- Modelsim
- Integrated Circuit Design
- Fpga
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