Harshal Patil
Engineering at Synopsys Inc
- Role
- Asic Digital Design Senior Engineer at Synopsys Inc
- Location
- Hyderabad, TG, IN
- LinkedIn followers
- 500 followers
About Harshal Patil
I am a CPU Verification Engineer with 4 years of experience in ARC core and subsystem…
Experience
Asic Digital Design Senior Engineer
Jan 2025 — Present
Education
Lovely Professional University
Bachelor of Technology - BTech
2018 — 2022
Birla Institute of Technology and Science, Pilani
Master of Technology - MTech
2025
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