Harsha Srinivasa Murthy
Staff Engineer @Alphawave Semi
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WORK HISTORY
Staff Engineer @Alphawave Semi
Toronto, ON, CA
EDUCATION
Arizona State University
MSE
Bangalore Institute of Technology
Bachelor of Engineering (B.E.)
ABOUT HARSHA SRINIVASA MURTHY
Physical Design Engineer with a demonstrated history of taping out IP/blocks in wide range of nodes (3nm-130nm BCD) for 8+ years.Successfully taped out IPs/blocks on latest nodes. Owned the IP/ block by performing end-to-end implementation (from RTL to GDSII) including physical, logical verification, timing closure and all the necessary signoffs.Hands on experience in physical design, verification and signing off Testchips.Strong engineering professional with MSE focused in Electronic and Mixed signal circuit design from Arizona State University.Worked on library physical view generation, PNR, benchmarking. Also, Skilled in Standard Cell Layout Design, Design Rule check (DRC), Design for Manufacturability, Layout Versus Schematic (LVS), Static timing analysis, RTL Design, Analog design, Mixed-Signal Design, Board Design, Hardware V&V, EMI/EMC testing, and FPGA platform.
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