Harsh Mishra
Hardware Verification Engineer | RTL | UVM | SystemVerilog | Coverage & Assertions
- Role
- Vlsi Engineer at Wipro
- Location
- Pune, IN
- LinkedIn followers
- 500 followers
About Harsh Mishra
I am a Design Verification Engineer at Wipro Limited, specializing in VLSI design verification to ensure reliable, high-performance semiconductor designs. My expertise spans SystemVerilog, UVM, functional verification, and coverage-driven methodologies, enabling me to validate complex digital designs and optimize verification efficiency. In my role, I: Execute verification plans for large-scale ASIC projects Run system simulations and debug failures to improve design robustness Develop reusable testbenches using UVM for scalable and modular verification Collaborate with cross-functional teams to enhance debugging efficiency I am passionate about problem-solving in VLSI, from catching elusive bugs in RTL to optimizing verification frameworks. I thrive in collaborative environments, enjoy exploring emerging trends in semiconductor technology, and constantly seek opportunities to enhance verification efficiency. Outside of VLSI, I find balance through meditation for focus and mindfulness and love engaging in stand-up comedy for a good laugh. I\'m also a passionate tennis ball cricket player, enjoying the thrill of the game whenever I get the chance. If you\'re working on exciting VLSI verification challenges, exploring new semiconductor trends, or just want to chat about tech, entertainment, or sports, feel free to reach out!
Experience
Vlsi Engineer
Jul 2021 — Present · Pune, IN
Education
Rajiv Gandhi Prodyogiki Vishwavidyalaya
Bachelor of Technology - BTech
St. Joseph's School Shaktinagar
Class X
Sri Chaitanya College of Education
Class Xll
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