Harsh Dholakiya

Pre Silicon Verification Engineer

Role
Pre Silicon Verification Engineer at Intel
Location
Bengaluru, IN
LinkedIn followers
500 followers

About Harsh Dholakiya

Verification Engineer,

Experience

  1. Pre Silicon Verification Engineer

    Intel

    Jan 2022 — Present

Education

  • Institute of Technology, Nirma University

    M.Tech

    2017 — 2019

  • Institute of Diploma studies, Nirma University

    Diploma in Electronics and Communication

    2010 — 2013

  • Birla Vishvakarma Mahavidhyala

    Bachelor of Engineering - BE

    2013 — 2016

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Harsh Dholakiya — Pre Silicon Verification Engineer at Intel in Bengaluru, IN | Unifers