Harivardhan Reddy

About Harivardhan Reddy

Verification engineer with 13 years of experience in verifying IP, Sub-system, SoC- A proud navodayan - Passionate of verification- Quick learner and good at problem solving- Verilog, System Verilog, UVM- Perl, python, Tcl, Shell, bash scripting- Good knowledge and working experience on almost all AMBA protocols- Experienced in verifying memory expander chiplets and SoC- Aware of die-to-die communication- Experience in GLS simulations and debugs- Experience in leading small (2) to big teams (10)- Decent understanding of PCIe, DDR protocols- Good Understanding of low power cores ( sifive ) and experience in verifying BootRom, TIM code- Good understanding of processor boot flow and understanding of Firmware simulation debugs- Experience in bring up of designs on FPGA- Good understanding and experience in verifying memory sub-systems and SoC. Especially on NVMe based SSD- Experience in bringing up design verification from scratch- Handled SoC & sub-system verification successfully till tape out- Good knowledge on verification of configurable NoC- Expertise in flash controller verification- expertise in NVMe based SSD controller verification - Good Knowledge of all Amba protocols- bit of experience with LDPC error correcting codes, AXI interconnect verification and, flash memory bfm design for verification - debugging and bring up of flash controller on FPGA- At the forefront of SoC verification, my role as Verification Lead at a dynamic startup has solidified my expertise in ASIC and debugging. Our team\'s success in verifying PCIe-based memory expander SoCs and Bootrom flows is a testament to our collective proficiency in complex verification scenarios- Previously, as a Verification Engineer at Intel, I honed my skills in the verification of configurable NOC for various protocols, further strengthening my technical leadership. My mission is to continually push the boundaries of SoC verification, ensuring meticulous and robust product development cycles.

Experience

1. Sr Mts

   Cerebras

   Jan 2025 — Present · Bengaluru, IN

Education

• Jawahar Navodaya Vidyalaya - JNV

  10th & 12th

  2000 — 2007

• IETE, Bangalore

  Bachelor of Engineering - BE, Electrical, Electronics and Communications Engineering

  2007 — 2011

• Jawaharlal Nehru Technological University

  Master’s Degree, Digital ECE

  2011 — 2013

Skills

• Fpga
• Asic
• Vlsi
• Soc
• Debugging
• Semiconductors
• Verilog
• Embedded Systems
• C
• Vhdl