Haris Khan Niazi
Hybrid Bonding R&D Metrology Lead
- Role
- Staff Advanced Packaging Systems & Technology Research Engineer at Intel
- Location
- New York, NY, US
- LinkedIn followers
- 500 followers
About Haris Khan Niazi
Haris Khan Niazi is Staff Advanced Packaging R&D Engineer in the Technology Research division at Intel Corporation. Haris leads hybrid bonding and 3D HI metrology and inspection with expertise in strategic roadmap definition and developing scalable solutions for sub-micron pitch interconnect technology. His research interests and contributions are focused on high speed, high resolution surface topography characterization, novel defect detection techniques and metrology induced design co-optimization. He actively contributes to conferences like ECTC and IEDM, and holds several patents in the domain of hybrid bonding overlay and innovative packaging solutions. Haris holds a Masters\' degree in Photonics and Optical Sciences from the University of Arizona, and a Bachelors\' degree in Electrical Engineering from LUMS, Pakistan.
Experience
Staff Advanced Packaging Systems & Technology Research Engineer
May 2025 — Present
Appointed R&D Intelligence lead for advanced packaging metrology and inspection to benchmark and improve internal capability vs. rest-of-world• Established 5 year roadmap indicating key technology inflections from R&D to HVM for 3D Packaging and the necessary metrology solutions needed to support them• Integrated standard test vehicles to identify inspection and yield bottlenecks in HVM hybrid bonding and pitch scaling process flows
Education
Lahore University of Management Sciences
Bachelor's degree, Electrical Engineering
2012 — 2016
University of Arizona
Master's degree, Optical Sciences
2017 — 2019
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