Hari Narain Ravikumar
Silicon Engineering, Architecture & Implementation
- Role
- Rtl Soc Design Engineer & Architect at Ambiq
- Location
- Austin, TX, US
- LinkedIn followers
- 500 followers
About Hari Narain Ravikumar
ASIC/FPGA Design Engineer with experience working on SoC Design, High Speed Peripherals, ARM Architecture. Experienced with Altera, Xilinx FPGAs. Extensive development and testing background. Currently working on ULP SoC Design
Experience
Rtl Soc Design Engineer & Architect
Sep 2021 — Present · Austin, TX, US
Designing highly Complex ultra low power endpoint edge AI chipsDesign, Architecture and full SoC Chip Bringup
Education
The University of Texas at Austin
Master's degree, Computer Science
The University of Texas at Dallas
Master’s Degree, Electrical Engineering
National Institute of Technology Raipur
Bachelor of Technology (B.Tech.), Electrical and Electronics Engineering
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