Haridas M K

Principal Engineer @Celero Communications

Ottawa, CA
MOBILE NUMBERS
+91 *********19

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WORK HISTORY

May 2025 — Present

Principal Engineer @Celero Communications

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Ottawa, ON, CA

EDUCATION

N/A

Birla Institute of Technology and Science, Pilani

Master of Science (MS), Micro Electronics

N/A

NTTF Electronics Centre ,Bangalore

Diploma, Electrical and Electronics Engineering

SKILLS

CmosPhysical DesignEdaVirtuosoMixed SignalLvsCadenceIcDrcAnalogVlsiDebuggingCadence VirtuosoSocAsicSemiconductors

ABOUT HARIDAS M K

Over 20 years of experience in custom and semicustom IC layouts.• Competent in Analog, Mixed Signal and Memory Layout Designs.• Experience with various analog processes as well as latest technology nodes including TSMC 3nm and 2nm.• Proficient in Device Matching, Parasitic Analysis, Electro-migration, and IsolationTechniques.• Good knowledge on Latch up, Metal density, Shield, Antenna and ESD.• Experience in handling full layout from Floor planning, Chip-top design and Tape out.

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Haridas M K — Principal Engineer at Celero Communications in Ottawa, CA | Unifers