Hari Shankar
Design Verification Engineer | UVM | SystemVerilog | SoC & IP Level Verification | FPGA| AHB, APB, AXI Protocols
- Role
- Design Verification Engineer at Manjeera Digital Systems Private Limited
- Location
- Hyderabad, IN
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
About Hari Shankar
Passionate and detail-oriented Design Verification Engineer with hands-on experience in…
Experience
Design Verification Engineer
Manjeera Digital Systems Private Limited
Nov 2022 — Present · Hyderabad, IN
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