Hareesh Alamalakala
- Role
- Asic Design Engineer at Apple
- Location
- San Francisco, CA, US
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
About Hareesh Alamalakala
I am an ASIC Design Engineer at Apple, where I have been working for over 13 years on…
Experience
Asic Design Engineer
Nov 2020 — Present
Education
SASTRA University
Bachelor's degree, Electronics and Communication Engineering
University of Cincinnati
Masters in Electrical Engineering, VLSI
2015 — 2016
Skills
- C++
- Spyglas
- Fifo
- Very-Large-Scale Integration (Vlsi)
- Vlsi
- Unix
- Uart
- Vhdl
- Pcb Design
- Hardware Architecture
- Usb3.0
- Linux
- I2c
- Integrated Circuit Design
- Modelsim
- Application-Specific Integrated Circuits (Asic)
- Ncsim
- System on a Chip (Soc)
- Logic Synthesis
- Perl
- Verilog
- Trace 32
- .net
- Rtl Design
- Vcs
- Xilinx
- Simulations
- Spi
- Amba Ahb
- Synopsys Tools
- C
- Fpga
- Gpio
- Questa Sim
- Embedded Systems
- Soc
- Axi
- Lint
- Perl Scripting
- Asic
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