Hardik Shah

About Hardik Shah

A highly Self-motivated & Self-managed Individual Contributor, looking forward to understand the Hardware System Architecture and Design to provide an optimum hardware end to end solution for Product Designs in COGS and Performance. Responsible as the Lead and Co-lead for Systems Engg of multiple Compute, GPU Compute & HPC Servers for over 3 years. Currently the Lead SE for the 3P AI Server Nodes for driving the complete SE function from the IDC Charter. Have 12.5 Years of Experience which comprises of High Speed Board Design for Enterprise Grade NW HW NPI Design, Validation Board Design for Modem Baseband Controller, Intel CPUs, Debug, Validation & Testing of boards with multiple ASICs, FPGAs, CPU, Power modules etc. Experience of complete Product development lifecycle by working with multiple cross-functional teams from SW, SI, CAD, Mechanical, Thermal, Power, MFG. etc. Have handled roles and responsibilities of Component selection, Hardware Design, Debug, Validation & Testing, System level testing and Documentation for RSP3 & RSP4 Board that operates in the ASR 907 Router1. Engineering Software: Cadence Concept HDL, Cadence Allegro Physical Viewer, Mentor Graphics Viewdraw.2. Interest: Multi Gigabit Routers, Workstation, HEDT, Overclocking, System Design, Memory, Storage.

Experience

1. Sr System Engineer System Validation & Debug

   Microsoft

   Feb 2022 — Present · Bengaluru, IN

   Responsible as the Lead for Systems Engg Function of Compute & multiple GPU Compute Servers for over 3 years. Driving MSFT SE & ODM SIT Team.I. Systems Engineering for the next ServerWoking as a Lead SE in early assessment stages.II. Systems Engineering for a next GEN Server for NWWoking as a Lead SE for assessing Validation Scope and Systems Engineering for enabling RTX PRO in a Modular Platform Server.[HPC]Currently the Lead SE of a team of 6 MSFT System Engg responsible for driving the System Requirements, Behavioural Spec, Testplans, Validation scenarios, Automation readiness, log reviews, SKU Qual, Scale Testing, bug filings & bug reviews.IV. Systems Engineering for Nvidia GB200 Server & Rack Infrastructure [GPU Compute].Was an Individual Contributor for the Validation Testplan creation for the Liquid Cooling portion of the AI Server [ND GB200-v6 VMs] & Rack.V. Systems Engineering for a Server for Gaming, Video Acceleration, VDI & Inferencing [GPU Compute].Was the Lead SE for 2 SKUs having AMD Radeon V710 GPU, AMD Alveo MA35D MAC [NVads V710 v5 & NMads MA35D series] for the SKU Qual, Validation & debugging issues. Reviewed Testplans, Validation scenarios, log reviews, bug filings & bug reviews.VI. Systems Engineering for AMD MI300X GPU UBB-8 based HPC Server [GPU Compute].Was a Co-lead responsible for the validation of the MI300X UBB-8 based server [ND-MI300X-v5 VMs].Lead a team of 8 MSFT System Engg to drive the validation across the multiple phases.Reviewed System Requirements, Testplans, Validation scenarios, log reviews, bug filings & bug reviews.VII. Systems Engineering for ARM64 CPU based Server [GP Compute].Worked as a Lead SE to validate a server having 3rd party ARM64 CPU. Responsible for driving the Part Selection, Testplans, Validation scenarios, Automation readiness, log reviews, SKU Qual, Scale Testing, bug filings, bug reviews, creating Interface heatmaps, provide inputs for gating/sign-off the gerbers.

Education

• Birla Institute of Technology and Science, Pilani

  Master of Engineering (M.E.), Embedded Systems

  2011 — 2013

• KJ Somaiya College of Engineering, Vidyavihar

  Bachelor of Engineering (B.E.), Electronics Engineering

  2008 — 2011

• Vivekanand Education Society's Polytechnic

  Diploma, Industrial Electronics

  2005 — 2008

• Sharon English High School

  S.S.C

  1995 — 2005

Skills

• Vhdl
• Verilog
• C
• Rtl Design
• Xilinx
• Modelsim
• Pspice
• Embedded Systems
• Eagle
• Fpga
• Vlsi
• Cadence Virtuoso
• X86 Assembly
• Matlab
• Arm7
• Code Composer Studio
• Edk
• Embedded C
• Keil
• Pcb Design
• Proteus
• Reconfigurable Computing
• Fpga Prototyping
• Asic
• Arm
• Spice
• Digital Signal Processors
• Atmel Avr
• Concept Hdl
• Dxdesigner
• Allegro Physical Viewer
• Computer Architecture
• Cpld
• 8051 Microcontroller
• Msp430
• Pentium
• Intel 8085
• Assembly
• Go-Getter Attitude
• High Level of Initiative