Hao Wen Ang

Design Verification Engineer @SkyeChip

Bayan Lepas, MY

Network-on-Chip(NoC)- Perform RTL verification of Network-on-Chip (NoC) IP, AMBA AXI, AHB, and APB protocols using SystemVerilog/UVM-based verification environments- Write and integrate SystemVerilog Assertions (SVA) for protocol checking, functional correctness, and coverage- Execute regression testing, debug simulation failures, and analyze waveforms using industry-standard simulators- Track and close functional, code, and assertion coverage to ensure verification completeness- Collaborate with design, architecture, and verification teams to identify and resolve RTL issues

Kuen Cheng High School

Unified Examination Certificate (UEC), Science

University of Southampton Malaysia

Master of Engineering - MEng, Electrical and Electronics Engineering

University of Southampton

Master of Engineering - MEng, Electrical and Electronics Engineering