Hao Jin
Senior ASIC DV, proficient in UVM, experienced in Network and AI ASIC tapeout
- Role
- Asic Engineer at Meta
- Location
- Sunnyvale, CA, US
- LinkedIn followers
- 500 followers
About Hao Jin
I have nearly 10 years of experience as a design verification engineer. I have been working for industry leaders such Cisco and Meta and participated in the tapeout of Networking and AI related ASICs.I\'m highly proficient in UVM based verification and overall DV planning.Contact Info:Email: h•••••@columbia.eduPhone:(64••••••87
Experience
Asic Engineer
Apr 2024 — Present · Sunnyvale, CA, US
Education
Wuhan University
Bachelor's degree, Electrical, Electronics and Communications Engineering
2009 — 2013
Columbia University
Master's Degree, Electrical and Electronics Engineering
2013 — 2014
Skills
- Synopsys Primetime
- Visual Basic
- Cadence
- Digital Ic Design
- Formal Verification
- Modelsim
- Tcl
- Electrical Engineering
- Perl Script
- Verilog
- Pspice
- Systemverilog
- Questa
- C++ Language
- Perl
- Embedded Systems
- Asic
- C
- Spice
- C++
- Synopsys Tools
- Systemc
- Asic Verification
- Vhdl
- Uvm
- Altera Quartus
- Cadence Virtuoso
- Rtl Design
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