Hanumanth Bollineni
Design Methodology @ Nvidia | SoC Integration & Verification | Verification Enthusiast | Problem Solver
- Role
- Sr Design Methodology Engineer at NVIDIA
- Location
- Chandler, AZ, US
- LinkedIn followers
- 500 followers
About Hanumanth Bollineni
Experienced SoC Methodology engineer with over a decade of expertise in designing SoC…
Experience
Sr Design Methodology Engineer
Aug 2024 — Present · Chandler, AZ, US
Education
Arizona State University
Master of Science
2007 — 2010
Osmania University
Bachelor of Engineering (B.E.)
2003 — 2007
Skills
- Computer Architecture
- Rtl Coding
- Spectre
- Rtl Design
- Cadence
- Vcs
- Dft
- Simulations
- Soc
- Circuit Design
- Verilog
- Hardware Architecture
- C++
- Logic Design
- Modelsim
- Open Verification Methodology
- Validation
- Systemverilog
- C
- Ovm
- System on a Chip (Soc)
- Very-Large-Scale Integration (Vlsi)
- Cadence Virtuoso
- Vlsi
- Perl
- Eda
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