Hamidreza Khazaei

Ai Hw Sw Co-design @Meta

Palo Alto, CA, US
MOBILE NUMBERS
+18•••••••20

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WORK HISTORY

Nov 2024 — Present

Ai Hw Sw Co-design @Meta

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Menlo Park, CA, US

I co-design hardware and software for smart glasses, taking workloads like graphics, neural networks, computer vision, and audio and optimizing them on DSPs—tuning both SW and HW to improve area, power, and performance- Led HW/SW co-design and profiling of a core vision workload on DSP, enabling migration from application processor to DSP and driving power savings while supporting a more compute-heavy configuration; delivered 30% cycle reduction and 20% memory reduction via low-level optimizations- Co-designed and optimized ML kernels for Cadence HiFi1/HiFi5 DSPs (including TIEs and pipeline changes), providing architecture feedback that reduced DSP area and power while preserving required ML performance- Implemented and validated production ML operators (quantized convolution, quantized linear, etc.), improving MAC utilization to 83%- Prototyped running parts of the graphics/texture pipeline on DSP (decompression, format conversion), achieving sub-1 cycle per pixel in key conversions and laying groundwork to future-proof graphics offload on DSP- Evaluated and enabled a vision neural network on DSP, using roofline and per-layer analysis to demonstrate ~1 ms inference latency, unlocking a low-power, privacy-preserving on-device tracking solution.

EDUCATION

2008 — 2010

Stanford University

Masters of Science, Electrical Engineering

2005 — 2008

University of Toronto

Bachelors of Applied Science, Electrical Engineering

ABOUT HAMIDREZA KHAZAEI

I’m a hardware/software co-design engineer and tech lead focused on optimizing real-time workloads on DSPs for on-device AI and AR/VR products. At companies like Meta, Apple, and Qualcomm, I’ve worked across multiple algorithm verticals, tuning both software and hardware to improve performance, power, and area. With a background in telecommunications, AI/ML, and software engineering, and a degree from Stanford, I bridge architecture, silicon, and application teams to turn complex algorithms into efficient, production-ready systems.

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