Guruyaswanth Reddy M
Analog Design Engineer
- Role
- Analog Design Engineer at Analog Devices
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
Experience
Analog Design Engineer
Sep 2025 — Present · Bengaluru, IN
Working as a contract Analog Design Engineer at Analog Devices through Vays Infotech Pvt Ltd.Verified vendor provided ARAGIO GPIO IP in ADICE by evaluating transmitter/receiver functionality across multiple drive strengths, slew rates, supply voltages and operating frequencies. Built a Simultaneous Switching Output(SSO) analysis setup by instantiating IO pads and modeling capacitive coupling, inductive coupling, power parasitics, package parasitics and transmission line effects for various load capacitances. Analysed VDD bounce and Ground bounce and incorporated termination.Worked on a 1.2 V op amp based BGR incorporating a startup circuit with BJT ratios of 1:8. Achieved a 1.2 mV deviation at the typical corner and ±7 mV deviation across PVT. For this, designed a two-stage PMOS input pair op-amp suitable for BGR operation across PVT with a gain greater than 65 dB. Incorporated Miller compensation for stability. Also worked on a 0.5 V low voltage BGR for the typical corner.
Education
JNTUA College of Engineering, Pulivendula
Bachelor of Technology - BTech, Electrical and Electronics Engineering
National Institute of Technology Calicut
Master of Technology - MTech, Microelectronics and VLSI Design
Find verified contacts for anyone on LinkedIn
Unifers gives sales teams verified emails and direct dials, enriched profiles, and outreach that lands in the inbox.
Free plan included · No credit card required
This profile is compiled from publicly available professional sources. Unifers is not affiliated with or endorsed by LinkedIn. Request removal of this profile.