Gurmeet S.
Asic Engineer at Meta | Pre & Post Silicon Validation | Ex-Qualcomm, TI, Freescale | 10+ Years Exp.
- Role
- Asic Infra Engineer Silicon at Meta
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
About Gurmeet S.
Digital Design Engineer with a decade of specialized expertise in the full validation lifecycle (Pre- and Post-Silicon). Alumnus of the National Institute of Technology (NIT), Kurukshetra, with a strong technical foundation in Electronics and Communications Engineering.
Experience
Asic Infra Engineer Silicon
Mar 2025 — Present · Bengaluru, IN
Bare-metal infrastructure development and validation for custom MTIA AI chips(for Facebook Data Centers), including both pre-silicon and post-silicon validation.
Education
SMB Gita Sr. Sec. School,Kurukshetra
High School
2006 — 2010
National Institute of Technology Kurukshetra
Engineer’s Degree, Electronics and Communications Engineering
2011 — 2015
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