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Rajat Gupta

Physical Design Engineer-Timing at Apple

Role
Physical Design Engineer-timing at Apple
Location
Sunnyvale, CA, US
LinkedIn followers
500 followers
EngineeringView LinkedIn profile

About Rajat Gupta

TECHNICAL SKILLS LANGUAGES: Python, C, C++, Tcl, Verilog HDL TOOLS: Primetime…

Experience

  1. Physical Design Engineer-timing

    Apple

    Jul 2018 — Present · Cupertino, CA, US

Skills

  • Unix Shell Scripting
  • Microsoft Excel
  • Shell Scripting
  • Xa
  • Perl
  • Sram
  • Cmos
  • Programming
  • Spice
  • C
  • Verilog
  • Tcl
  • Vlsi
  • Soc
  • Very-Large-Scale Integration (Vlsi)
  • Hsim
  • Physical Design
  • Linux
  • Finfets
  • Algorithms
  • Matlab
  • Hspice
  • Vhdl
  • C++
  • Integrated Circuit Design
  • Pspice
  • Functional Verification
  • Circuit Design
  • Cadence Virtuoso
  • Schematic Editor

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Rajat Gupta — Physical Design Engineer-timing at Apple in Sunnyvale, CA, US | Unifers