Guoqing Chen

About Guoqing Chen

Years of engineering and research experience in very large scale digital IC design with advanced technology nodes, from 32nm to 4nm • In depth understanding and hands on skills in all physical design areas from RTL to GDS • Proficient in SoC hierarchical physical design implementation and flow automation• Proven track of record on a number of CPU/GPU/AI tape-outs

Experience

1. Physical Design Engineer

   Tenstorrent

   Apr 2024 — Present · Austin, TX, US

Education

• Tsinghua University

  M.S, EE

  1998 — 2001

• University of Rochester

  Ph.D, ECE

  2001 — 2007

• Tsinghua University

  B.S, EE

  1993 — 1998

Skills

• Ic
• Static Timing Analysis
• Spice
• Semiconductors
• Verilog
• Simulations
• Eda
• Low-Power Design
• Rtl Design
• Physical Design
• Processors
• Cmos
• Computer Architecture
• Logic Synthesis
• Timing Closure
• Asic
• Dft
• Integrated Circuit Design
• Microprocessors