Gulshan Mishra

STA Engineer

Role
Sr Design Engineer at STMicroelectronics
Location
South Delhi, IN
LinkedIn followers
500 followers

About Gulshan Mishra

A trained STA professional with the working Knowledge of handling block-level STA and complete SOC STA runs using standard EDA tools. Core Competencies - • Created full flow setup for SOC and working on a complete CSTA runs for Soc Sta runs from scratch. • Understand and debug following issues : Run crashes, resolve the bbox, non annotation, LNK-00•••••67,IMPDB-25•••55, IMPESI-3025 (tran extrapolated )FT Punching error, lppi issues (supply port or net mismatch), Cons error (unconstraint paths, gen clock.), memory shoot up, Netlist issues generating DC_FT punched netlist. creating diff machine conf.etc • Working closely with constraints team, helping them in debugging to clean constraints for timingclosure. • Good Understanding of STA fundamentals OCV, AOCV, CPPR, MCMM, Time Borrowing/Given, Graph/Path based analysis, Timing Closure and Techniques to resolve setup and hold violations. • Well-versed with the RTL2GDSII & PnR flows, Implementation at 40nm. 32nm, 28nm technology node Using Industry standard tools. • Proficient at Floorplanning, Power-planning, Placement & Optimization, Clock-Tree-Synthesis {CTS}, Routing, Reliability Checks (signal integrity & ECO). • Knowledge of Low power Design such as Retention Flop, Always On Buffer, Level Shifter cells, Clock gating, Power gating, Multi vth cells. • Conceptual Understanding of DRV`s and scain chains. • Implement Multicore processor on ZedBoard [from.v to Fpga board] • Good VLSI basics, Digital Electronics & Cmos theory. EDA tools/FPGA used - • EDA Tools - INNOVUS, ICCII.Primetime,Tempus • Simulation Engine - Modelsim [Mentor graphics], Active HDL. • Synthesis & Analysis : Xylinx Vivado • FPGA board : ZedBoard, CPLD-01, Spartan, NUmneto. Technical Languages - • Scripting - TCL, Perl • HDL - Verilog, VHDL. • Data Extraction - Awk, grep Soft Skills - Self motivated, Planning & Result Oriented.

Experience

  1. Sr Design Engineer

    STMicroelectronics

    May 2023 — Present · Noida, IN

    Working on Soc

Education

  • Aravali College of Engineering and Management

    Bachelor of Technology - BTech, Electronics and Communications Engineering

    2015 — 2019

  • Indian Institute of Technology, Roorkee

    Master of Technology - MTech, VLSI

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Gulshan Mishra — Sr Design Engineer at STMicroelectronics in South Delhi, IN | Unifers