Guangliang Yao
Design Engineer at Micron Technology
- Role
- Design Engineer at Micron Technology
- Location
- San Jose, CA, US
- LinkedIn followers
- 500 followers
About Guangliang Yao
Experienced Design Engineer with a demonstrated history of working in the semiconductors…
Experience
Design Engineer
Oct 2015 — Present · San Francisco, CA, US
Responsible for 3D NAND memory controller firmware, on-chip controller RTL design and validation designs.2. Writing new features for controller firmware to meet RWB feature requirement using Verilog.3. Verifying multiple functions of 3D NAND controller by both white box and manual validation.4. Creating test vectors and performing functional verification of 3D NAND Flash along with relevant scripts and tools.
Education
University of Southern California
Master of Science (MS), Electrical and Electronics Engineering
2013 — 2015
Harbin Institute of Technology
Bachelor’s Degree, Electrical and Electronics Engineering
2009 — 2013
Skills
- Circuit Design
- C
- Vlsi
- Cadence Virtuoso
- Fpga
- Verilog
- Algorithms
- Physical Design
- Vhdl
- Perl
- Rtl Design
- Modelsim
- Matlab
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