Sai Vamshi Gekkepally
Engineer @高通
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WORK HISTORY
Engineer @高通
IN
Subsystem Verification
EDUCATION
Vidya Jyothi Institute Of Technology
Bachelor of Technology
ABOUT SAI VAMSHI GEKKEPALLY
Electronics has always fueled my curiosity, and I\'m grateful to be doing what I love as a VLSI Verification Engineer. Here\'s a snapshot of my journey and expertise:1. Proficient in IP and Subsystem-level verification. Languages & Methodologies: SystemVerilog, UVM, Verilog, and Python scripting. Skilled in Mentor Questa, Cadence SimVision, Synopsys VCS, and Verdi. Created and executed test cases, identified design failures, and reported bugs. Familiar with AXI, AHB, APB, PCIe, LINBus, and I3C. Strong in writing constraints, assertions, and achieving comprehensive coverage closure.
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